Control for the output voltage on a flying capacitor multilevel inverter

Main Article Content

Beatriz Angélica Aguilar-López http://orcid.org/0000-0002-2769-4992
José Antonio Juárez-Abad http://orcid.org/0000-0001-7440-0849
Jorge Luis Barahona-Avalos https://orcid.org/0000-0002-5502-6692
Rosalino Mayoral-Lagunes http://orcid.org/0000-0003-3420-7416
Jesús Linares-Flores http://orcid.org/0000-0002-5723-4786
Marco Antonio Contreras-Ordaz http://orcid.org/0000-0002-3478-796X

Abstract

This paper presents the design of a robust Active Disturbance Rejection Controller (ADRC) for tracking the reference trajectory of the output voltage of a flying capacitor multilevel inverter. If the dynamics of each flying capacitor and of the passive elements of the filter are considered in the dynamic model of the converter, it results a high order model, which is difficult to control. PS-PWM modulation is used in this work to keep the voltages in the flying capacitors at their nominal values, and thereby generate a second-order simple dynamic model that is easier to control. The simulation and experimental results confirm that the controller is robust in the presence of disturbances, caused by either linear or nonlinear load changes. The experimental prototype of the complete system was built, and the implementation of the controller and the modulator was carried out in a FPGA; the results obtained are shown in the final part.
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